B. Tech Projects Supervised (include student name, title & semester/yr):
1) VLSI implementation of Vector Processor for Image enhancement in spatial domain
-P.Mohan, K.Kamalakannan, P.Balakrishnan-May 2006
2) Implementation of Log-map algorithm based Turbo decoder using MATLAB and VHDL. - B.Anandakumar, M.Arunkumar, S.Balachandar-May 2006
3) VLSI implementation of Adaptive Viterbi Decoder.
-Potluri Seetal, Chetan Krishna Dhulipalla, Saju sundaresan-April 2007
M. Tech Projects Supervised (include student name, title & semester/yr):
1) Design and implementation of a super scalar fetch engine with trace cache
- Chaitanya Sunkavalli-May 2006
2) Design of a Dual threshold CMOS circuits - Amaranth Akkavarapu-May 2006
3) Low Power SRAM Design -
Banka Nareshkumar (CB205VL002)-May 2007
4) Hardware modeling and verification of ARM Prime cells using SystemC.
M.Sarath Chandra -May 2007
Publications / Patents
“CMOS VLSI implementation of Analog Neuron using PWM technique” –National Conference on VLSI design and testing (NCVDAT), Jan 2003 at PSG college of technology, Coimbatore.
"Practical oscillation based test for CMOS OPAMPS: Experimental Results” – Power Conversion and Industrial Control Conference –July 2004 at N.S.S College of
Engineering, Palakad
”Biometric fingerprint based RFID” –IEEE-ISI-2005 conference - May 2005 –Atlanta-USA.
Springer Web link: http://www.springerlink.com/index/10.1007/11427995_99
Demos/ Products:
1. Developed Multimedia based training module for the CADENCE IUS tool.
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