Amrita Vishwa Vidyapeetham

VLSI Development of Finite Field Arithmetic

Principal Investigator:

Dr.M.Sethumadhavan

Advisory Board

Dr. T. R. Padmanabhan

Last Review

26th January 2007

Campus

Ettimadai

School

Amrita School of Engineering

Department

Amrita TIFAC-CORE in Cyber Security

Duration

Two years

Executive Summary

In this project we attempt to address various VLSI design related issues with a special focus on low area and low power implementation of the finite filed arithmetic. We intend to select a few algorithms with the potential for application in the area. Their realization with FGPA will be studied, analyzed and compared. The focus will be on the identification of algorithms and parameter combinations which will deliver optimum performance.

Funding Sponsor

National Technical Research Organization

Books & Publications

Patents

Presentations

Website

http://www.amrita.edu/ccs

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