Start Time Duration Activity Speaker Organization Topic
09:30 AM 0:30 Inauguration      
10:00 AM 0:45 Keynote Mr. Jean Louis Boulanger ISA France Applications of Formal Methods
10:45 AM 0:15 Tea      
11:00 AM 0:45 Guest Talk Ms. Vaishnavi Mathworks Ensuring Safety and Security in High Integrity Embedded Systems using Static Analysis Methods
11:45 AM 0:45 Guest Talk Mr. Rakesh ALSTOM Cyber security- RAIL Transport Signaling Solution
12:30 PM 1:00 Lunch      
01:30 PM 0:45 Guest Talk Santonu Sarkar, Principal Consultant ABB Dependability Issues in Cyber-Physical Systems
02:15 PM 0:20 Session 1 Manupriya Srivastava, Parinitha BM, Rajani T, Sivabhavani J, Anitha Kumari SN, Chitra Viswanathan, Subrata Rakshit CAIR Uncovering thine Achilles' Heel: Assessment of Program Analysis Tools
02:35 PM 0:20 Session 1 Dhanabal Arunachalam Robert Bosch Tool Qualification Framework easing the Certification Process in Safety Critical/Safety Related Applications
02:55 PM 0:20 Session 1 Bhadrachalam Chitturi Amrita Vishwa Vidyapeetham Testbed Architecture Selection and Anomaly Detection with Test Flow Graphs
03:15 PM 0:20 Session 1 Siva Bhavani J, Manupriya Srivastava, Chitra Viswanathan, Shailesh R Chansarkar, Subrata Rakshit CAIR SACHETNA for Security Aware Compilation Using GCC
03:35 PM 0:20 Session 1 Arjun Sanjeev, Venkatesh Choppella, Viswanath Kasturi IIIT- Hyderabad Peterson's Mutual Exclusion Algorithm as Feedback Control
03:55 PM 0:10 Wrap up      
04:05 PM 0:30 Tea      
04:35 PM 0:20 Session 2 Prachi Goyal, John Paul, Manju Nanda, Jayanthi J CSIR-NAL Mutation Analysis of operators in Stateflow models in IMAT Tool
04:55 PM 0:20 Session 2 Nagaraj MS, Ravi Kiran, Roopa Kalluri Honeywell Identifying Untestable Low Level Requirements using Formal Method Techniques
05:15 PM 0:20 Session 2 M G Thushara, K Somasundaram, Jayaraj Poroor Amrita Vishwa Vidyapeetham Analysis of Numerical Accuracy in Floating Point Programs Using Abstract Interpretation
05:35 PM 0:10 Wrap up      
Start Time Duration Activity Speaker Organization Topic
09:00 AM 0:45 Guest Prof Bharat Jayaram Buffalo University, USA Model Extraction and runtime Verification of a JAVA based UAV
09:45 AM 0:45 Guest Mr. Kalyan Krishnamani NVIDIA, USA Formal Verification in the Modern Era
10:30 AM 0:15 Tea      
10:45 AM 0:20 Session 3 Natasha Jeppu, Yogananda Jeppu Honeywell A Formal Analysis of Modes with Controller using Model Checking
11:05 AM 0:20 Session 3 Devina Mohan,Raoul Jetley ABB Static Code Analysis for Device Description Language
11:25 AM 0:20 Session 3 Jinesh M Kannimoola,Bharat Jayaraman, Krishnashree Achuthan Amrita Vishwa Vidyapeetham Declarative Modeling and Verification of Firewall Rules with Temporal Constrained Objects
11:45 AM 0:20 Session 3 Swaminathan Jayaraman, Devi Sree Rajan, Bharat Jayaraman Amrita Vishwa Vidyapeetham Towards Runtime Verification with Activity Diagrams
12:05 PM 0:20 Session 3 Shubha Raj K B, Basawareddy PES Institute of Technology, Bangalore South Campus An Application to Android Security Using Automated Model Checking Tool: UPPAAL
12:25 PM 0:20 Session 3 Vijay Bahadur Singh, Tuur Benoit, Vincent Braibant Siemens Breaking down silos with contract based design for industrial software development: illustrated through an aerospace case study
12:45 PM 1:00 Lunch      
01:45 PM 0:45 Guest Talk Prof. Sumesh Divakaran GEC, Idukki Refinement-based verification of FreeRTOS in VCC
02:30 PM 0:30 Guest Talk Dr. Yogananda Jeppu Honeywell Failures in Safety Critical Systems
03:00 PM 0:15 Tea      
03:15 PM Workshop        
03:15 PM 0:30 Workshop Mr. Chethan CU Mathworks Simulink Design Verifier - Overview and demo
03:45 PM 1:00 Workshop Mr. Chethan CU Mathworks Modelling Simple Systems in Simulink and checking
04:45 PM 2:00 Workshop Mr. Chethan CU Mathworks Hands Excercises
Start Time Duration Activity Speaker Organization Topic
09:00 AM 00:30 Workshop Dr. Yogananda Jeppu Honeywell EARS Requirements
09:30 AM 00:30 Workshop Dr. Yogananda Jeppu Honeywell Nusmv Overview
10:00 AM 01:00 Workshop Dr. Yogananda Jeppu Honeywell Modelling in NUSmv
11:00 AM 00:15 Tea      
11:15 AM 01:00 Workshop Ms. Amritha Amrita Vishwa Vidyapeetham Frama-C
12:15 PM 01:00 Lunch      
01:15 PM 01:00 Workshop Ms. Jevitha Amrita Vishwa Vidyapeetham UPPAL
02:15 PM 01:00 Workshop Dr. M. Sethumadhavan, Professor Amrita Vishwa Vidyapeetham Propositional and predicate logic, Higher order Logic, Proofs
03:15 PM 00:15 Tea      
03:30 PM 01:00 Workshop Dr. A. R. Vasudevan Amrita Vishwa Vidyapeetham Theorem proving using Isabelle
04:30 PM 0:15 Workshop Dr. Swaminathan J Amrita Vishwa Vidyapeetham Live demo of JIVE Model Checker
04:45 PM 0:30 Valedictory Address Dr. Sateesh K S CSI Block Chain Technologies​
05:15 PM 00:20 Certificate Distribution      
05.35 PM 00:10 Vote of Thanks Dr. Bhadrachalam Chitturi Amrita Vishwa Vidyapeetham  
NIRF 2017