National Workshop on Embedded Design Flow Using Xilinx ZynQ Soc
The Department of Electronics and Communication Engineering, Amrita Vishwa Vidyapeetham Coimbatore campus will organize a national workshop on Embedded Design Flow Using Xilinx ZynQ Soc from February 27-28 2015.
Electronics is among the fastest growing areas in engineering and technology in the last few decades. The rapid strides made in the fields of Signal processing have fuelled the growth of new hand-held devices and applications that have redefined the scope of modern communication devices from supporting mere voice and data services to sophisticated platforms that host whole gamut of applications. This has been made possible by the concurrent developments in Hardware Design and Fabrication.
This workshop will provide the best and most up-to-date research results and industry-oriented technical contents, thereby facilitating a global exchange of ideas and the identification and shaping of future trends and directions in these fields.
CoreEL is a leading systems design, FPGA Core and Design services company, located in Bangalore, India's Silicon Valley. We are a pioneer among the Indian companies that envisaged the concept of IP cores and made it a successful business proposition. CoreEl is associated with Xilinx as a distributor for over eleven years, from 1993 onwards and has the credit of popularizing Xilinx FPGA technology in India.
This workshop strives to drive excellence in teaching-learning experience through setting up world class laboratory infrastructure and enabling the teaching staff and students on the latest tools, technologies and methodologies.
|DAY 1||DAY 2|
|EDK Overview||Software Development - Basics|
|Lab 1: Basic Hardware Design||Software Development - Advanced|
|Hardware Design||Lab 4: Writing Basic Software Application|
|Hardware Design Using EDK||Address Management|
|Lab 2: Adding IP to a Hardware Design||Software Development and Debug using SDK|
|Adding Your Own IP to the OPB Bus||Lab 5: Advanced Software Writing|
|Lab 3: Adding Custom IP||Lab 6: Cross Debug|