Dr. Kalyan Bhattacharyya currently serves as Associate Professor at the department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore. He joined Amrita University in 2015. He obtained MASc by research from McMaster University, Hamilton, Ontario, Canada in 2004 and PhD from Indian Institute of Technology (IIT) Bombay in 2015, both degrees in Electrical Engineering (RF Microelectronics and VLSI Design Branch).

He has worked 8 years with Multinational Industries like joint venture of Philips Telecommunication Industries (6.5 years) and as a Govt. Scientist for around 3 years at Institute for Plasma Research, India. He has done 8 years of Teaching Assistantship during his Masters in Canada and during his PhD at IIT Bombay. He has also worked in IIT Bombay for 1 year, six months as a Research Engineer and six months as a Research Associate (Post-Doctoral). His areas of interest include CMOS RF VLSI Design, Receiver and Transmitter Design for 60 GHz 5G Mobile Communication and 77 GHz Automotive Radar applications, Monolithic Microwave Integrated Circuits, and Nano-scale MOSFET/SoIMOSFET/GaN-HEMT Device Physics and Transmitter design.

Dr. Kalyan's current research project is design, simulation, fabrication (through UMC foundry Brussels) and testing of Low Noise Amplifiers for UWB bands and QVCO in 180nm CMOS for which he has received SEED funding. He has designed and fabricated Microelectronic chips (ICs) through TSMC foundry Taiwan since 2002 and UMC foundry Brussels since 2009 onwards and Characterization in Canada/IITB/IISc/V-NIT. He has published several papers in IEEE including IEEE Transaction on VLSI Systems and IEEE International Conference on VLSI Design. He has presented research papers at the conferences in the USA, Canada, and India. He has four Indian Patents granted on Distributed Oscillator, Tunable Distributed Voltage Controlled Oscillator and Second and Third Harmonic Frequency Distributed Oscillators, all for generating Microwave signals in CMOS technology. He has served as a reviewer for the journal of IEEE Transaction on VLSI Systems and worked with the organizers of IEEE International Conference on VLSI Design. He has given several invited talks and tutorials on CMOS RF/Analog Microelectronic Chip (IC) Design. He has received full Graduate Scholarship for his studies in Canada and complete funding of PhD from “TaTa Consultancy Services VLSI Design” project at IIT Bombay. He is a member of IEEE.   

Research

Research Area for Projects

CMOS RF Integrated Circuits such as Broadband Distributed Amplifiers (1-100 GHz), Low Noise Amplifiers (57-64 GHz), Distributed Oscillators (60 GHz), Cross-Coupled Oscillators (60 GHz), Maximum Gain Ring Oscillators (90 GHz), Mixers and Broadband Mixers, Class E Power Amplifiers (60 GHz and higher frequency), PLL components such as Injection Locked Frequency Dividers etc.

Research Expertise 

Guiding Ongoing PhD Work titled "Design, simulation, fabrication and characterization Quadrature Voltage Controlled Oscillator and complete Receiver for 60 GHz 5G application in Silicon and Silicon-on-Insulator CMOS."

PG Projects

  •  LNA/LNTA of UWB band in 180nm CMOS for fabrication through UMC foundry Brussels  
  • LNAs in 65nm CMOS for 60/77 GHz bands 
  • Quadrature Oscillator/VCO (60 GHz band in 65nm CMOS) 
  • Class E Power Amplifier for RF Communication (millimeter wave in 65nm CMOS)
  • Stacked and Doherty SoI-MOSFET/GaN HEMT RF/mm-wave Power Amplifiers 
     

 UG Projects

  • Distributed LNA (UWB band in 180nm CMOS) 
  • 60 GHz Down-conversion Mixer (65nm CMOS) 
     

 Proposed Research opportunities for prospective researchers 

  • Complete Receiver and Transmitter for 60 GHz 5G Mobile Communication and 77 GHz Automotive Radar Applications (65nm CMOS).
  • Broadband Distributed Amplifier (1-100 GHz) in 65nm CMOS for 100 Gb network 
  • PLL component such as Injection-Locked Frequency Divider (60 GHz and below in 65nm CMOS) 
     

Funded Projects 

Ongoing: Title – Design, Simulation, Fabrication (through UMC foundry Brussels) and Testing of Low Noise Amplifiers for UWB bands and QVCO in 180nm CMOS and Fabrication of Microwave Microstrip Passive Circuits through foundry in India Agency – SEED Grant for which Rupees 3.5 Lakhs granted by our Amrita University  Duration – August 2016 – July 2017

Teaching 

 PG  UG 
CMOS RF IC Design  Radio Frequency Circuit Design
CMOS Analog VLSI Design  Electronic Circuits (Theory and Lab) 
Solid State Electronics Devices and Modeling Microwave Engineering Lab 
EDA Simulators based RF/Analog IC Labs   
VLSI Technology  

Publications

Publication Type: Patent
Year of Publication Publication Type Title
2016 Patent K. Battacharya, “Distributed oscillator for generating a high frequency third harmonic microwave signal having high power output (Indian Patent Number - 273155)”, 2016.[Abstract]

Distributed oscillator for generating a high frequency third harmonic microwave signal having high power output. The oscillator comprises a plurality of gain cells in a parallel configuration. Each of the gain cells comprises a bottom n-MOSFET (metal oxide semiconductor field effect transistor and a top n-MOSFET (metal oxide semiconductor field effect transistor) each having a gate length of 0.18µm. The drain of each bottom n-MOSFET of each gain cell is connected to the gate of the top n-MOSFET thereof. The drain of each top n-MOSFET is connected to a drain transmission line and the gate of each bottom n-MOSFET is connected to a gate transmission line . The drain transmission line comprises a coplanar waveguide (CPW) at each end thereof and a coplanar waveguide (CPW) between every two drains and the gate transmission line comprises a coplanar waveguide (CPW) at each end thereof and a coplanar waveguide (CPW) between every two gates. The output end of the drain transmission line is connected to the input end of the gate transmission line through a feed back path . The body (and source of each bottom n-MOSFET and top n-MOSFET are earthed. The input end of the drain transmission line is connected to a voltage supply . The output end of the gate transmission line is connected to a frequency collector . A peeking inductor is connected across the gate and drain of the bottom n-MOSFET of each of the odd number gain cells. The length of each of the end CPWs in the drain transmission line and gate transmission line is half the length of the CPW between every two drains or gates and the inductance of the peeking inductor connected across the gate and drain of the bottom n-MOSFET of each of the odd gain cells is 1nH. More »»
2016 Patent K. Battacharya, “Tunable distributed harmonic voltage controlled oscillator for generating second and third harmonic microwave signals, in CMOS technology (Indian Patent Number - 273154)”, 2016.[Abstract]

Tunable distributed harmonic voltage controlled oscillator for generating second and third harmonic microwave signals. The oscillator comprises a plurality of gain cells in a parallel configuration. Each gain cell comprises a bottom n-MOSFET and a top n-MOSFET, each of gate length 0.18µm. The drain of each bottom n-MOSFET is connected to the gate of the respective top n-MOSFET. The drain of each top n-MOSFET is connected to a drain transmission line and the gate of each bottom n-MOSFET is connected to a gate transmission line . The drain transmission line comprises a CPW at each end thereof and a CPW between every two drains. The gate transmission line comprises a CPW at each end thereof and a CPW between every two gates. The output end of the drain transmission line is connected to the input end of the gate transmission line through a feed back path . The body of each bottom n-MOSFET and top n-MOSFET is connected to a body bias voltage and the source of each bottom n-MOSFET and top n-MOSFET is earthed. The input end of the drain transmission line is connected to an input voltage . The output end of the gate transmission line is connected to a frequency collector . A peeking inductor is connected across the gate and drain of each bottom n-MOSFET. The length of each of the end CPWs in the drain transmission line and gate transmission line is half the length of the CPW between every two drains and gates, respectively. When the inductance of each peeking inductor is 2 to 2.25nH, the oscillator generates a high frequency second harmonic microwave signal with a high power output. When the inductance of each peeking inductor is 1 to 1.1 nH the oscillator generates a high frequency third harmonic microwave signal with a high power output. When the inductance of each peeking inductor is 1.25 nH the oscillator generates high frequency second and third harmonic microwave signals with a high power output . More »»
2016 Patent K. Battacharya, “Distributed oscillator for generating a high fundamental frequency microwave signal having high power output, in CMOS technology (fixed frequency) (Indian Patent Number - 273113)”, 2016.[Abstract]

File Last modified on: Mon Jul 30, 2012 15:12:41

Distributed oscillator for generating a high frequency microwave signal

Distributed oscillator for generating a high frequency microwave signal. The oscillator comprises a plurality of gain cells in a parallel configuration. Each of the gain cells comprises a bottom n-MOSFET (metal oxide semiconductor field effect transistor) and a top n-MOSFET (metal oxide semiconductor field effect transistor) each having a gate length of 0.18µm. The drain of each bottom n-MOSFET is coupled to the gate of each top n-MOSFET through a coplanar waveguide (CPW) . The drain of each top n-MOSFET is connected to a drain transmission line and the gate of each bottom n-MOSFET is connected to a gate transmission line . The drain transmission line comprises a coplanar waveguide (CPW) at each end thereof and a coplanar waveguide (CPW) between every two drains and the gate transmission line comprises a coplanar waveguide (CPW) at each end thereof and a coplanar waveguide (CPW) between every two gates. The output end of the drain transmission line is connected to the input end of the gate transmission line through a feed back path . The body and source of each bottom n-MOSFET and each top n-MOSFET are earthed. The input end of the drain transmission line is connected to a voltage supply . The output end of the gate transmission line is connected to a frequency collector and the gates of the top n-MOSFETs each is connected to a voltage supply . The length of each of the end CPWs in the drain transmission line and gate transmission line is half the length of the CPW between every two drains or gates and the length of each CPW coupling the gate of a top n-MOSFET and drain of a corresponding bottom n-MOSFET is greater than the length of the CPW between every two drains or every two gates by a factor of at least.

More »»
2015 Patent K. Battacharya, “Tunable Distributed Voltage Controlled Oscillator for Generating High Frequency Microwave Signals (Indian Patent Number - 269540)”, 2015.[Abstract]

A tunable distributed voltage controlled oscillator for generating high frequency microwave signals. The oscillator comprises a plurality of stages of complimentary metal oxide semiconductor (CMOS) inverters in parallel configuration. Each of the inverters comprises a p-metal oxide semiconductor field effect transistor (MOSFET) at the top and a n-metal oxide semiconductor field effect transistor (MOSFET) at the bottom with their gates connected to a supply voltage and to a gate transmission line and their drains connected to the supply voltage and to a drain transmission line . The drain transmission line and the gate transmission line are connected to each other through a feed back path . The drain transmission line and the gate transmission line each comprises a plurality of coplanar wave guides in series respectively. The number of coplanar wave guide in each of the gate and drain transmission lines is greater than the number of stages of CMOS inverters by a factor of 1. The body of the p-MOSFET is inwardly directed and connected to a forward body bias voltage and the source of the p-MOSFET is connected to the supply voltage. The body of the n-MOSFET is outwardly directed and the body and source of the n-MOSFET are earthed. The gate transmission line further comprises a frequency collector . More »»

Faculty Details

Qualification:

Designation: 
Faculty Email: 
b_kalyan@cb.amrita.edu