Dr. Somasundaram K. currently serves as Professor and Chairperson in the Department of Mathematics, School of Engineering, Coimbatore Campus. His areas of research include Multilinear Algebra, Graph Theory, Graph Theory Algorithms in Network on Chip.






Publication Type: Journal Article
Year of Publication Publication Type Title
2016 Journal Article P. Mohan, K. Somasundaram, Dash, S. S., Das, S., and Bhaskar, M. A., “Design and evaluation of 3D NoC routers with quality-of-service (QoS) mechanism for multi-core systems”, Advances in Intelligent Systems and Computing, vol. 394, pp. 429-441, 2016.[Abstract]

The importance of on-chip communication interconnects was greatly highlighted with the advent of semiconductor technology at nanoscale domain. As the sizes of semiconductor features are reduced day by day, there occurred problems related to wiring. Network-on-Chip architectures are therefore implemented to overcome the wiring issues and have lately been considered as an important area for research. The communication on NoC is carried out in specific topologies by means of routers. In this paper, Partial Mesh of Grid topology (PMG) is considered. We use the Quality of Service (QoS) mechanism to minimize the area and power. PMG-based NoC will give minimum area and power and it reduces the high chances of redundant connections. Throughput and latency are analysed along with other parameters like packet loss ratio and jitter using network simulator NS-2. Area and power analyses are done using Synopsys Design Compiler and PrimeTime PX tool. Our experimental results show that the architecture with QoS mechanism gives a significant reduction in area and power when compared to Region-based Routing (RBR) mechanism. Moreover, the partial mesh of grid topology gives minimal latency and high throughput when compared to mesh of grid topology. © Springer India 2016.

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2015 Journal Article Aa Gupta, Geetha, J., and K. Somasundaram, “Total coloring algorithm for graphs”, Applied Mathematical Sciences, vol. 9, pp. 1297-1302, 2015.[Abstract]

A total coloring of a graph is an assignment of colors to all the elements of graph such that no two adjacent or incident elements receive the same color. Behzad and Vizing conjectured that for any graph G the following inequality holds: Δ(G)+1≤X′′(G)≤Δ(G)+2, where Δ(G) is the maximum degree of G. Total coloring algorithm is a NP-hard algorithm. In this paper, we give the total coloring algorithm for any graph and we discuss the complexity of the algorithm. © 2015 Aman Gupta, J. Geetha and K. Somasundaram.

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2015 Journal Article J. Geetha and K. Somasundaram, “Total coloring of generalized sierpiński graphs”, Australasian Journal of Combinatorics, vol. 63, pp. 58-69, 2015.[Abstract]

A total coloring of a graph is an assignment of colors to all the elements of the graph in such a way that no two adjacent or incident elements receive the same color. In this paper, we prove the tight bound of the Behzad and Vizing conjecture on total coloring for the generalized Sierpiński graphs of cycle graphs and hypercube graphs. We give a total coloring for the WK-recursive topology, which also gives the tight bound. © 2015,University of Queensland. All rights reserved.

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2013 Journal Article N. Viswanathan, Paramasivam, K., and K. Somasundaram, “Performance and cost metrics analysis of a 3D NoC topology using network calculus”, Applied Mathematical Sciences, vol. 7, pp. 4173-4184, 2013.[Abstract]

The packet switching based Network-on-Chip (NoC) is an obvious interconnect design alternative to the shared bus, crossbar or ring based on-chip communication architecture used in System-on-Chips (SoCs). The advent of the three dimensional NoC (3D NoC) architecture attracts added interest as it offers improved performance and shorter global interconnect. In the 3D NoC architecture, topology plays a vital role in determining the performance of the interconnect architecture. The performance and cost metrics of the 3D NoC topology are evaluated by using simulation in general. However, analytical models provide more insights on how the traffic related parameters influence the performance of the topology. In this paper, the traffic related parameters of a 3D NoC topology, namely 3D Recursive Network Topology (3D RNT) are evaluated by using network calculus based methodology and the results of the evaluation are compared against the results produced using simulation. © 2013 N. Viswanathan et al.

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2009 Journal Article K. Somasundaram, “Graph Mates”, Electronic Notes in Discrete Mathematics, vol. 33, pp. 37-41, 2009.[Abstract]

A weighted digraph graph D is said to be doubly stochastic if all the weights of the edges in D are in [0, 1] and sum of the weights of the edges incident to each vertex in D is one. Let Ω(G) be denoted as set of all doubly stochastic digraphs with n vertices. We defined a Graph Mates in Ω(G) and derived a necessary and sufficient condition for two doubly stochastic digraphs are to be a Graph Mates. © 2009 Elsevier B.V. All rights reserved. More »»
2008 Journal Article SaMaria Arulraj and K. Somasundaram, “Permanental Mates: Perturbations and Hwang's conjecture”, Applied Mathematics Letters, vol. 21, pp. 786-790, 2008.[Abstract]

Let Ωn denote the set of all n × n doubly stochastic matrices. Two unequal matrices A and B in Ωn are called permanental mates if the permanent function is constant on the line segment t A + (1 - t) B, 0 ≤ t ≤ 1, connecting A and B. We study the perturbation matrix A + E of a symmetric matrix A in Ωn as a permanental mate of A. Also we show an example to disprove Hwang's conjecture, which states that, for n ≥ 4, any matrix in the interior of Ωn has no permanental mate. © 2007 Elsevier Ltd. All rights reserved. More »»
Publication Type: Conference Proceedings
Year of Publication Publication Type Title
2014 Conference Proceedings N. V. Anjali and K. Somasundaram, “Design and evaluation of virtual channel router for mesh-of-grid based NoC”, International Conference on Electronics and Communication Systems (ICECS), 2014 . Coimbatore, 2014.[Abstract]

Network on Chips (NoCs) has now replaced the bus based architectures for communication between different cores in a multiprocessor System on Chip (SoC). NoC integrates SoCs in a better manner. It has the advantage of good scalability and high bandwidth. The communication on NoC is carried out by means of routers. Routers are the back bone of NoC. The design of routers is different for different topologies. In this paper, a Mesh-of-Grid topology is considered. A virtual channel router for mesh of grid topology of NoC is presented here. Area and Power is synthesized for the virtual channel router using Synopsys Design Vision. The experimental results show that the area and power will increase if the bit size of flit is increased.

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2013 Conference Proceedings P. Subramanian and K. Somasundaram, “A Note on Some Conjectures in Permanents”, The 3rd India-Taiwan Conference on Discrete Mathematics. Taiwan, 2013.
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