Dr. Yamuna B. joined Amrita in the year 2000. She did her B. E. in Electronics and Communication Engineering and M. E. in VLSI design from Bharathiar and Anna University respectively. She completed her Ph.D. in Error Control Coding from Amrita University in 2013. She has published papers in international journals and international conferences.

She has served as reviewer and Program committee member in international conferences. Dr. Yamuna's Research Interest include Applications of Error Control Coding, VLSI Architecture for Channel Encoders, Wireless Systems, Decoders and related areas.

Research Expertise

Selected UG & PG Projects

  • Performance enhanced Iterative Soft-Input Soft-Output Decoding algorithms for Block Turbo codes.
  • Soft Decision Decoding Scheme for Linear Block codes using Genetic Neural Network algorithm and Particle Swarm Optimization algorithm.
  • Decoding of Linear Block codes using Partial Reliability Level List based low complex A* Algorithm.
  • Decoding of Linear Block codes using Information sets and Reliability based error insertion.
  • Adaptive iterative threshold decoding of Block Turbo Codes.
  • Secure Turbo codes with a predecoder architecture.
  • Scheduling Algorithm for IEEE 802.16.
  • VLSI Architecture for Reed Solomon CODEC.

Ongoing PhD, PG&UG Work

  • Soft decision decoding of Turbo codes.
  • Low complex Turbo decoder.
  • Error correcting codes for semiconductor memory.
  • Joint error correction and encryption.

Research opportunities for prospective researchers

  • Genomic coding.
  • Energy efficient Turbo codes for wireless sensor networks.
  • Error control coding for 5G IoT
  • Performance enhanced Turbo decoding algorithms for wireless networks and mobile applications.
  • Improved stopping criterion for iterative decoding of Turbo codes.
  • VLSI realization of Turbo decoder with enhanced performance.
  • VLSI realization of iterative Turbo decoder with improved stopping criterion.
  • Error correction based encryption.


  1. Information Theory and Coding Techniques
  2. Estimation and Detection Theory
  3. Solid State Device Modelling
  4. Electronic Circuits
  5. Digital Design
  6. Advanced Digital Design
  7. Spread Spectrum Communication


Publication Type: Journal Article
Year of Publication Publication Type Title
2016 Journal Article V. Sudharsan and Yamuna, B., “Support vector machine based decoding algorithm for BCH codes”, Journal of Telecommunications and Information Technology, vol. 2016, pp. 108-112, 2016.[Abstract]

Modern communication systems require robust, adaptable and high performance decoders for efficient data transmission. Support Vector Machine (SVM) is a margin based classification and regression technique. In this paper, decoding of Bose Chaudhuri Hocquenghem codes has been approached as a multi-class classification problem using SVM. In conventional decoding algorithms, the procedure for decoding is usually fixed irrespective of the SNR environment in which the transmission takes place, but SVM being a machine-learning algorithm is adaptable to the communication environment. Since the construction of SVM decoder model uses the training data set, application specific decoders can be designed by choosing the training size efficiently. With the soft margin width in SVM being controlled by an equation, which has been formulated as a quadratic programming problem, there are no local minima issues in SVM and is robust to outliers. © 2016, National Institute of Telecommunications. More »»
2016 Journal Article P. Salija and Yamuna, B., “An Efficient Early Iteration Termination for Turbo Decoder”, Journal of Telecommunications and Information Technology, 2016.
2016 Journal Article B. Yamuna and Sudharsan, V., “Support vector machine based decoding algorithm for BCH codes.”, Journal of Telecommunications and Information Technology, 2016.
2016 Journal Article B. Yamuna and T.R, P., “Reliability level list-based decoding of multilevel modulated block codes (Accepted)”, International Journal of Information and Communication Technology, 2016.[Abstract]

Different Soft decision decoding approaches for block codes which refine the Hard decision decoding have been reported. These approaches have varying degrees of complexity and performance enhancement. The Reliability Level List (RLL) based decoding scheme for block codes directly uses the reliability of the received bit with corresponding dividend in decoding. With this scheme it has become possible to identify the Target Codeword (TCW) directly obviating the need for forming an intermediate set of candidate codewords and then selecting the decoded codeword from them. This opens up the possibility of exploring a comprehensive generalization of the RLL concept for any block code and any baseband scheme. Such a generalization for block codes with M-QAM signaling scheme is established in the paper. More »»
2015 Journal Article P. Salija and Yamuna, B., “Optimum energy efficient error control techniques in wireless systems: a survey”, Journal of Communications Technology and Electronics, vol. 60, pp. 1257-1263, 2015.[Abstract]

Energy efficiency and error free transmission have become prime concerns in wireless communication in recent years. Such networks are much more affected by errors due to dynamic channel conditions than normal wired networks. Error control coding is commonly used in the entire range of information com-munication to reduce the harmful effects of the channel. In order to overcome the communication errors in an energy efficient way, an error control mechanism with less complexity is required. Energy efficient error control techniques to prolong network lifetime in resource limited network and wireless communication remains a challenge. This paper forms a survey of recent developments on the various energy efficient error control coding techniques used in wireless communication and resource limited networks/hardware. © 2015, Pleiades Publishing, Inc.

More »»
2015 Journal Article B. Yamuna, V. Krishna, S. Vamsi, Kolisetty, H., C. Krishna, V., Raju, R. R., and Reddy, S. B. A., “A fast converging decoding scheme based on particle swarm optimization for block codes”, International Journal of Applied Engineering Research, vol. 10, 2015.
2014 Journal Article B. Yamuna and Padmanabhan, T. R., “A minimal search soft decision list decoding algorithm for reed-solomon codes”, International Journal of Information and Communication Technology, vol. 6, pp. 71-85, 2014.
2014 Journal Article , Arjithasindhuri, R., Saiprasanth, L., A. Shakthi, S., Srithar, R., and Yamuna, B., “Decoding of Linear Block Codes using Partial Reliability Level List based Low Complex A* Algorithm”, International Conference on Electrical, Electronics and Computer Engineering, 2014.
2013 Journal Article B. Yamuna and Padmanabhan, T. R., “Reliability level list based direct target codeword identification algorithm for binary BCH codes”, WSEAS Transactions on Communications, vol. 12, pp. 287-299, 2013.[Abstract]

In BCH coded schemes the reliability information available with the demodulated bits can be effectively used for soft decision decoding (SDD) to improve signal to noise ratio performance. Chase algorithms, their adaptations, and modifications available for SDD trade complexity for performance to different levels. A new iterative algorithm - Reliability Level List based Direct Target Codeword Identification Algorithm (DTCI) - is proposed in the paper; the algorithm yields the best that is possible with SDD. The concept of reliability level list (RLL) introduced in the paper is central to the application of the algorithm. At every stage of the iterative process followed, the algorithm uses the reliability information of the bits and identifies the next most likely candidate word to be examined. This ensures that the correct decoded codeword is identified through the shortest number of steps. Detailed simulation studies with different BCH codes amply bring out the effectiveness and superiority of the algorithm.

More »»
2012 Journal Article B. Yamuna and Padmanabhan, T. R., “A reliability level list based SDD algorithm for binary cyclic block codes”, International Journal of Computers, Communications and Control, vol. 7, pp. 388-395, 2012.[Abstract]

Soft decision decoding (SDD) provides a better coding gain by making use of the unquantized channel output. In this paper we introduce the concept of a Reliability Level List (RLL); based on the RLL a new SDD algorithm for Binary Phase Shift Keying (BPSK) based binary cyclic block codes is proposed. The algorithm guarantees to extract the most reliable codeword in an iterative manner. The formation of the RLL involves a search for the next possible entry into the RLL based on the error probability which is a reflection of the reliability values of the bits of the received word obtained from the channel. The procedure for the formation of RLL which is the central idea of the paper is given as a structured algorithm. © 2006-2012 by CCC Publications.

More »»
Publication Type: Conference Proceedings
Year of Publication Publication Type Title
2005 Conference Proceedings S. Veni and Yamuna, B., “Hardware implementation of CNN”, International Conference on Intelligent sensing and information Processing (ICISIP). IEEE , Le Royal Meridian, Chennai, pp. 320-325, 2005.
Publication Type: Conference Paper
Year of Publication Publication Type Title
2004 Conference Paper S. Veni and Yamuna, B., “Analog VLSI implementation of Cellular Neural Network and its applications to Image Processing”, in International Conference on Systemics, Cybernatics and Informatics, Pentagram Research Centre Pvt Ltd, Hyderabad , 2004.
Faculty Details


Faculty Email: