Publication Type:

Journal Article

Source:

Analog Integrated Circuits and Signal Processing, Volume 90, Number 3, p.573–589 (2017)

URL:

https://link.springer.com/article/10.1007/s10470-016-0915-x

Abstract:

Scaling of minimum length of the MOSFET has improved its performance but has reduced the breakdown voltage which makes it prone to Electrostatic Discharge (ESD) damage. This work presents a low-power gm-boosted common gate (CG) ultra wideband (UWB) low noise amplifier (LNA) architecture, operating in the 5–7 GHz range, employing current-reuse technique with LC based Electrostatic Discharge (ESD) protection. Common gate topology supports wide band input matching and noise figure independent of operating frequency. A PMOS common source topology is used as the gm-boosting stage in order to reduce the noise figure and to remove the dependency of noise figure from the bias point. The gm-boosting stage and the amplifier share common bias current to reduce the power consumption of the LNA. A shunt inductor, series capacitor and power clamp are used for protecting the circuit from ESD damage. The ESD circuit is co-designed with the input matching network in order to reduce the area of the layout. The proposed topology has shown significant improvement in gain and noise figure with ESD protection.

Cite this Research Publication

S. Ankathi, Vignan, S., Athukuri, S., Mohan, S., Karthigha Balamurugan, and M. Devi, N., “A 5–7 GHz Current Reuse and Gm-Boosted Common Gate Low Noise Amplifier with LC based ESD Protection in 32 nm CMOS”, Analog Integrated Circuits and Signal Processing, vol. 90, pp. 573–589, 2017.