Publication Type:

Conference Proceedings

Source:

ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology, Volume 1, Kanyakumari, p.350-354 (2011)

ISBN:

9781424486779

URL:

http://www.scopus.com/inward/record.url?eid=2-s2.0-79961237539&partnerID=40&md5=63ff9d6f2b0ff79cedbb2dc07300fa37

Keywords:

Area overhead, Benchmark circuit, Characteristic polynomials, Exhaustive tests, Fault coverages, LFSR, Linear feedback shift registers, Pattern Generation, Phase shift, Random pattern, seed selection, Shift registers, Test pattern generator

Abstract:

Pattern generation is the most important module in a BIST. Out of many test pattern generators (TPG) explored for BIST, linear feedback shift registers (LFSR) are widely used due to their ability to produce highly random patterns. Various improvements over the basic forms of LFSR are available. In the current study, the selection of an appropriate LFSR for a given benchmark circuit is analyzed. It is done by considering various factors such as selection of characteristic polynomial and seed to obtain high fault coverage, minimize invalid patterns, area overhead and time taken to generate the patterns. © 2011 IEEE.

Notes:

cited By (since 1996)0; Conference of org.apache.xalan.xsltc.dom.DOMAdapter@f43f173 ; Conference Date: org.apache.xalan.xsltc.dom.DOMAdapter@35a0bcd9 Through org.apache.xalan.xsltc.dom.DOMAdapter@4bce6610; Conference Code:85884

Cite this Research Publication

Na Haridas and M. Nirmala Devi, “Efficient linear feedback shift register design for pseudo exhaustive test generation in BIST”, ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology, vol. 1. Kanyakumari, pp. 350-354, 2011.