Publication Type:

Conference Paper

Source:

2015 25th International Conference on Field Programmable Logic and Applications (FPL) (2015)

Keywords:

Central Processing Unit, complex computational problems, CPU-only system techniques, Digital signal processors, DSP, dynamic task management, Fabrics, Field programmable gate arrays, GPU, graphic processing units, graphics processing units, Hardware, heterogeneous-computing systems, hybrid CPU-FPGA systems, Message systems, microarchitecture, multicore CPU, operating system, Program processors, system software support

Abstract:

Today's computing systems are heterogeneous, with diverse micro-architectures. It is common to design systems comprising multi-core CPUs, Digital Signal Processors (DSP) and Graphic Processing Units (GPUs). In addition to these devices, the extensive configurability and parallelism in Field Programmable Gate Arrays (FPGAs) has proven to be advantageous for accelerating complex computational problems. In comparison to CPUs, DSPs and GPUs, FPGAs have a distinctly different microarchitecture. In this context, enabling seamless application execution in a system composed of FPGAs alongside CPUs, is a major challenge. As a consequence, simplifying programmability of hybrid CPU/FPGA systems demands innovations in system software support. There has been research in extending the traditional CPU-only system techniques to CPU/FPGA based hybrid systems to make way for FPGA-based mainstream computing. This article surveys techniques in dynamic task management aimed at reducing or completely eliminating the burden of operating system writers for CPU/FPGA hybrid systems and provide insight to researchers to explore further.

Cite this Research Publication

Meena Belwal, Dr. Madhura Purnaprajna, and Dr. T.S.B. Sudarshan, “Enabling seamless execution on hybrid CPU/FPGA systems: Challenges amp; directions”, in 2015 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.

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