The requisite properties of analog CNN components, like the Gilbert multiplier, Operational transconductance amplifier, and the current mirror, were separately estimated. Interconnect for a single cell was analyzed , and extended for a 3 /spl times/3 CNN, that has been implemented. A programmable integration time-constant and a template programmability is found possible. It is also seen that implementation is possible at very low power levels, typically 124 uW. The network considered in this design is a continuous-time rectangular type CNN with r = 1. In this paper the network was implemented using analog VLSI techniques and their performance was verified using cadence spectre IC5. The designed CNN could be used for the applications such as image processing, solution of partial differential equation, modelling of nonlinear phenomenon, physical system simulation, etc.
S. Veni and Dr. Yamuna B., “Hardware implementation of CNN”, International Conference on Intelligent sensing and information Processing (ICISIP). IEEE , Le Royal Meridian, Chennai, pp. 320-325, 2005.