Publication Type:

Patent

Source:

Number US 10/425,306, USA (2005)

URL:

https://www.google.com/patents/US6887781

Abstract:

Electronic components such as semiconductor wafer VLSI and ULSI integrated circuit devices are provided having a robust barrier layer in the device interconnects. The robust barrier layer provides excellent step coverage, low resistance and enhanced adhesion to CVD copper and the interconnect has a double structure of a layer of a barrier material and a metal layer thereon. The metal layer is preferably tungsten and is formed by replacing silicon or other such atoms on the surface of the barrier layer with tungsten metal. A layer of silicon can be formed on the barrier layer, silicon atoms can be formed on the surface by reacting the barrier layer with a silicon containing reactant or a silicon containing barrier layer can be used.

Cite this Research Publication

S. H. Lee and Dr. Sasangan Ramanathan, “Method for the Formation of Diffusion Barrier”, U.S. Patent US 10/425,3062005.

It appears your Web browser is not configured to display PDF files. Download adobe Acrobat or click here to download the PDF file.

207
PROGRAMS
OFFERED
5
AMRITA
CAMPUSES
15
CONSTITUENT
SCHOOLS
A
GRADE BY
NAAC, MHRD
9th
RANK(INDIA):
NIRF 2017
150+
INTERNATIONAL
PARTNERS