Publication Type:

Patent

Source:

(2006)

URL:

http://www.google.com/patents/US7125776

Abstract:

A method of manufacturing a MOSFET type semiconductor device includes planarizing a gate material layer that is deposited over a channel. The planarization is performed in a multi-step process that includes an initial “rough” planarization and then a “fine” planarization. The slurry used for the finer planarization may include added material that tends to adhere to low areas of the gate material.

Cite this Research Publication

Dr. Krishnashree Achuthan, Ahmed, S. S., Wang, H. H., and Yu, B., “Multi-step chemical mechanical polishing of a gate area in a FinFET”, 2006.

It appears your Web browser is not configured to display PDF files. Download adobe Acrobat or click here to download the PDF file.

207
PROGRAMS
OFFERED
6
AMRITA
CAMPUSES
15
CONSTITUENT
SCHOOLS
A
GRADE BY
NAAC, MHRD
8th
RANK(INDIA):
NIRF 2018
150+
INTERNATIONAL
PARTNERS