Publication Type:



Volume US7307002 B2, Number US 11/099,339 (2007)



A method is disclosed for the definition of the poly-1 layer in a semiconductor wafer. A non-critical mask is used to recess field oxides in the periphery prior to poly-1 deposition by an amount equal to the final poly-1 thickness. A complimentary non-critical mask is used to permit CMP of the core to expose the tops of core oxide mesas from the shallow isolation trenches.

Cite this Research Publication

K. Dr. Achuthan, Foster, C. M., Kim, U., Kinoshita, H., Raeder, C. H., Sachar, H. Kaur, Sahota, K. Singh, and Sun, Y., “Non-critical complementary masking method for poly-1 definition in flash memory device fabrication”, U.S. Patent US 11/099,3392007.