Publication Type:

Journal Article


VLSI Design, Volume 2012 (2012)



Commerce, Data flow analysis, Data flow graphs, Data paths, Design space exploration, Evolutionary techniques, Execution time, Functional units, Genetic algorithms, High Level Synthesis, Low Power, Multi objective, Multi objective optimizations (MOO), Multi-objective GA, Multiobjective optimization, Non-dominated sorting genetic algorithm - ii, NSGA-II, Pareto front, Particle swarm optimization (PSO), Power Optimization, Solution quality, Weighted Sum


<p>High-Level Synthesis deals with the translation of algorithmic descriptions into an RTL implementation. It is highly multi-objective in nature, necessitating trade-offs between mutually conflicting objectives such as area, power and delay. Thus design space exploration is integral to the High Level Synthesis process for early assessment of the impact of these trade-offs. We propose a methodology for multi-objective optimization of Area, Power and Delay during High Level Synthesis of data paths from Data Flow Graphs (DFGs). The technique performs scheduling and allocation of functional units and registers concurrently. A novel metric based technique is incorporated into the algorithm to estimate the likelihood of a schedule to yield low-power solutions. A true multi-objective evolutionary technique, "Nondominated Sorting Genetic Algorithm II" (NSGA II) is used in this work. Results on standard DFG benchmarks indicate that the NSGA II based approach is much faster than a weighted sum GA approach. It also yields superior solutions in terms of diversity and closeness to the true Pareto front. In addition a framework for applying another evolutionary technique: Weighted Sum Particle Swarm Optimization (WSPSO) is also reported. It is observed that compared to WSGA, WSPSO shows considerable improvement in execution time with comparable solution quality. © 2012 D. S. Harish Ram et al.</p>


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Cite this Research Publication

S. Harish, Bhuvaneswari, M. Cb, and Prabhu, S. Sa, “A novel framework for applying multiobjective GA and PSO based approaches for simultaneous area, delay, and power optimization in high level synthesis of datapaths”, VLSI Design, vol. 2012, 2012.