Publication Type:

Journal Article

Source:

Journal of Scientific and Industrial Research, Volume 72, Number 4, p.217-221 (2013)

URL:

http://www.scopus.com/inward/record.url?eid=2-s2.0-84876223216&partnerID=40&md5=e64749b1cdac7fcffaa68e2dba16f9ac

Keywords:

electric field, electrical power, numerical model

Abstract:

NAND and NOR gates are the two universal logic gates and any other logic gates can be built using them. This paper presents a novel three transistors (3T) based NAND gate with exact output logic levels, yet maintaining comparable performance than the other available NAND gate logic structures. The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs. The simulation tests were performed by employing standard 90nm CMOS process technology. © 2012 The Council of Scientific and Industrial Research, New Delhi. All rights reserved.

Notes:

cited By (since 1996)0

Cite this Research Publication

MaGeetha Priya and Baskaran, Kb, “A novel low power 3 transistor based universal gate for VLSI applications”, Journal of Scientific and Industrial Research, vol. 72, pp. 217-221, 2013.

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