As device dimensions and supply voltage are shrinking, the design of high-speed and high-resolution analog-to-digital converters (ADCs) is getting more and more challenging. Since the shrinking device sizes enable high-speed and low-power digital circuits, there has been a trend to use digital circuits to estimate and correct for the analog circuit nonidealities (i.e. calibrate) to realize high-performance ADCs. This summary paper enumerates some of the digital techniques that have been adopted in the past two decades to realize high-speed high-resolution pipelined ADCs, which are typically used in communication and imaging applications.
B. Sahoo, “An overview of digital calibration techniques for pipelined ADCs”, in IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 2014 , College Station, TX, 2014.