Publication Type:

Journal Article

Source:

Electronics Letters, Volume 49, Number 10, p.666-667 (2013)

URL:

http://www.scopus.com/inward/record.url?eid=2-s2.0-84880221682&partnerID=40&md5=312f083868e6c86fffd6420132b6cc37

Keywords:

Band pass, Dynamic range, Electronics engineering, Error feedback, First-order, Pipelined ADCs, Proposed architectures, Technology

Abstract:

A high-speed, large dynamic range fS/4 bandpass ΔΣ-modulator using a first-order error-feedback loop is proposed. The internal quantiser is realised using a high-speed pipelined ADC. Error feedback is achieved by exploiting the implicit latency in a pipelined ADC. The proposed architecture achieves an SNR of 94 dB with an OSR of 32. © The Institution of Engineering and Technology 2013.

Notes:

cited By (since 1996)0

Cite this Research Publication

V. Sarma and Sahoo, B., “Pipelined ADC based design of bandpass ΔΣ-ADC”, Electronics Letters, vol. 49, pp. 666-667, 2013.

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