Publication Type:

Conference Paper

Source:

2015 International Conference on VLSI Systems, Architecture, Technology and Applications, VLSI-SATA 2015, Institute of Electrical and Electronics Engineers Inc. (2015)

ISBN:

9781479979264

URL:

http://www.scopus.com/inward/record.url?eid=2-s2.0-84925597319&partnerID=40&md5=60211f5343add548e004c59b8ec2d37d

Keywords:

Basic building block, Better performance, Computer architecture, Elastic buffer, Error detection, Error-detection mechanism, Errors, Input and outputs, Network architecture, Network-on-chip, Network-on-chip(NoC), NoC architectures, Router architecture, Routers, VLSI circuits

Abstract:

Router is the basic building block of the interconnection network. In this paper, new router architecture with elastic buffer is proposed which is reliable and also has less area and power consumption. The proposed router architecture is based on new error detection mechanisms appropriate for dynamic NoC architectures. It considers data packet error detection, correction and also routing errors. The uniqueness of the reliable router architecture is to focus on finding error sources accurately. This technique differentiates permanent and transient errors and also protects diagonal availabilities. Input and output buffers in router architectures are replaced by elastic buffers. Routers spend considerable area and power for router buffer. In this paper the proposed router architecture replaces FIFO buffers with the elastic buffers in order to reduce area, and power consumption and also to have better performance. © 2015 IEEE.

Notes:

cited By 0; Conference of 2015 International Conference on VLSI Systems, Architecture, Technology and Applications, VLSI-SATA 2015 ; Conference Date: 8 January 2015 Through 10 January 2015; Conference Code:111173

Cite this Research Publication

R. Louis, Vinodhini, M., and N.S. Murty, “Reliable router architecture with elastic buffer for NoC architecture”, in 2015 International Conference on VLSI Systems, Architecture, Technology and Applications, VLSI-SATA 2015, 2015.