Publication Type:

Conference Paper

Source:

Advanced Computing and Communications, 2006. ADCOM 2006. International Conference on, IEEE (2006)

ISBN:

9781424407163

Abstract:

<p>This paper proposes a process aware selective placement scheme for N-way set associative cache with the help of a victim set. In this work, we consider the data cache subsystem, as it is one of the most power consuming microarchitectural parts of an embedded system and set associative cache, being one of the popular mapping schemes for data cache. We propose a selective placement scheme to reduce tag comparison and power consumption using victim set. We show that, this scheme has reduced the tag comparison by 70% and power saving by 72% as compared to conventional caching scheme. Experimental results are obtained using Simplescalar 2.0 cache simulator for SPEC95benchmark suite.</p>

Cite this Research Publication

B. K. Raveendran, Sudarshan, T. S. B., and Gurunarayanan, S., “Selective Placement Data Cache for Low Energy Embedded System”, in Advanced Computing and Communications, 2006. ADCOM 2006. International Conference on, 2006.

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