A low noise amplifier (LNA) operating at millimeter wave (mmWave) frequency and a down converter suitable for IEEE 802.11ad receiver is designed in a 65Â nm radio frequency (RF)-CMOS low leakage (LL) process. These designed blocks are integrated in a super heterodyne receiver architecture and the overall performance of the receiver is analyzed. The designed LNA gives a performance metric of 20Â dB of gain, 1.7Â dB of noise figure (NF) and −7.78Â dBm of IIP3. Modified Gilbert cell topology is used for down converter which gives a conversion gain of 1.5Â dB from 57Â GHz to 66Â GHz, input P1dB of −7.8dBm and IIP3 of 8.78Â dBm with RF at 57.24Â GHz from a 1.2Â V supply voltage and a 1Vpp of local oscillator (LO) drive. The obtained IIP3 is 10.08Â dB higher than the conventional Gilbert cell and offers an error vector magnitude (EVM) improvement of −23Â dB at the receiver. This work provides RF designers a comprehensive understanding of system and circuit level on pre silicon base. © 2019, ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering.
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S. Pournamy and Dr. Navin Kumar, “System Level Performance Analysis of Designed LNA and Down Converter for IEEE 802.11ad Receiver”, Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering, LNICST, vol. 276, pp. 17-32, 2019.