Publication Type:

Conference Paper

Source:

Green Computing Communication and Electrical Engineering (ICGCCEE), 2014 International Conference , IEEE (2014)

URL:

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6922242&tag=1

Keywords:

alpha-power model, Delay circuits, gate control, Logic gates, MOSFET, MuGFET, multiple gate FETs, packaging density, Power demand, Power dissipation, power reduction perspective, scaled multiple gate FET, scaled multiple gate MOSFET, scaled single gate FET, scaling, semiconductor device packaging, short channel effects, short-channel effects, Threshold voltage, time delay, transistor leakage

Abstract:

The progress towards making efficient chips, in terms of area, speed and power continues to remain a major concern of every silicon industry. The various effects that become prominent at nanometer level hinders this progress. This is a paper that looks into: scaling, its effects (short-channel effects, as it is called) and compares scaled single gate and scaled multiple gate FETs on important properties. The use of scaled multiple gate MOSFETs (MuGFETs) ensures better gate control and alpha-power model demonstrates reduction in time delay in MuGFETs, than in scaled single gate FETs. This shows that the short-channel effects are overcome by scaled MuGFETs, thereby not only facilitating higher packaging density, but also reducing power consumption and at the same time improving switching performance.
pp.1-6, INSPEC Accession Number:14666017

Cite this Research Publication

A. Sushmitha, Narthanaa, K., Aravindan, I., Kumar, A. S. Ajay, and Sundari, B. B. T., “Towards MuGFETs: A power reduction perspective”, in Green Computing Communication and Electrical Engineering (ICGCCEE), 2014 International Conference , 2014.