Publication Type:

Conference Paper

Source:

Proceedings of the IEEE International Conference on VLSI Design, IEEE Computer Society, Volume 2015-February, Number February, p.265-270 (2015)

URL:

http://www.scopus.com/inward/record.url?eid=2-s2.0-84938227017&partnerID=40&md5=23abca1b2dd168bc3c08c838b67c3b2f

Keywords:

Amplifiers (electronic), Analog integrated circuits, Analog to digital conversion, Analog to digital converters, Bandpass filters, Capacitors, CMOS integrated circuits, Correlated double sampling, Current sensing, Design, Double sampling, Double sampling technique, Embedded systems, Frequency converters, Low pass filters, Low power electronics, Memory architecture, Operational amplifiers, PGA, Programmable gain amplifier, Programmed control systems, Second orders, Signal conditioning circuits, Strain measurement, VLSI circuits

Abstract:

This paper proposes a wide dynamic-range low-power signal conditioning circuit for low-side current sensing application. The proposed architecture uses a double sampling technique for switched capacitor programmable gain amplifier (SC-PGA) thus enabling the PGA to work at low frequency. However, the analog-to-digital converter (ADC), which digitizes the amplified signal works at high frequency to achieve high dynamic range. The double sampling technique relaxes the slew rate and settling requirement of the op amp in the PGA. The switched capacitor implementation obviates the need for explicit level-shifting circuit while enabling rail-to-rail input common mode. The closed loop SC-PGA architecture is very robust to gain drift due to temperature and supply voltage variation. The design incorporates correlated double sampling technique to overcome offset and flicker noise. The analog-to-digital converter used in this design is a multi-bit second order ΔΣ-ADC [14]. The circuit is implemented in AMS 0.35 μm CMOS process with 3.3 V supply. Simulations show that the overall system, i.e., PGA and ΔΣ-ADC, achieves a dynamic range in excess of 80 dB while consuming 2 mA. © 2015 IEEE.

Notes:

cited By 0; Conference of 28th International Conference on VLSI Design, VLSID 2015 - held concurrently with the 14th International Conference on Embedded Systems ; Conference Date: 3 January 2015 Through 7 January 2015; Conference Code:113073

Cite this Research Publication

T. Rahul, Sahoo, B. Datta, Arya, S., Parvathy, S. J., and Vulligaddala, V. B., “A Wide Dynamic-Range Low-Power Signal Conditioning Circuit for Low-Side Current Sensing Application”, in Proceedings of the IEEE International Conference on VLSI Design, 2015, vol. 2015-February, pp. 265-270.