This paper presents a new zero suppressed binary decision diagram (ZBDD)-based approach for obtaining larger number of relaxed bits. These test sets find major application in reducing the power consumed during testing. Experiments performed on single and multiple stuck-at faults using ZBDDs show better results in terms of percentage of relaxation over the existing comparable BDD-based approaches. Moreover using these relaxed test vectors and by suitable X-filling methods average switching activity (ASA) of the circuit can be reduced, which will reduce the power dissipation during testing.
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N. Mohan and Dr. Anita J. P., “A zero suppressed binary decision diagram-based test set relaxation for single and multiple stuck-at faults”, International Journal of Mathematical Modelling and Numerical Optimisation, vol. 7, pp. 83-96, 2016.