Project Incharge: 
Dr. M. Sethumadhavan
Dr. T. R. Padmanaban
Date: 
Wednesday, November 29, 2006
Center: 
TIFAC CORE in Cyber Security
School: 
School of Engineering
Funding Agency: 
GoI

In this project we are attempting to address various VLSI design related issues with a special focus on low area and low power implementation of the finite filed arithmetic. We intend to select a few algorithms with the potential for application in the area. Their realization with FGPA will be studied, analyzed and compared. The focus will be on the identification of algorithms and parameter combinations which will deliver optimum performance.