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Course Detail

Course Name Computer Organization and Architecture
Course Code 15CSE301
Program B. Tech. in Computer Science and Engineering
Semester Five
Year Taught 2019


Unit 1

Introduction and Performance of Computing system, Processor Architecture with example as MIPS & Instruction Set, Single Cycle Datapath Design, Control Hardware, Computer Arithmetic, Floating Point Arithmetic, Role of performance.

Unit 2

Introduction to multicycle datapath, Pipelining Technique – Design Issues, Hazards: Structural Hazards, Data Hazards and Control Hazards, Static Branch Prediction, Dynamic Branch Prediction, Advanced Concepts in pipelining.

Unit 3

Memory Organization – Introduction, Cache Memory Organization, Main Memory & Interleaving, I/O Organization, Modern Processors, Parallel Processing.

Text Books

  1. Patterson, David A and J L Hennessy, “Computer Organisation & Design, The Hardware/ Software Interface (ARM Edition)”, Morgan Kaufmann, Fifth Edition, Newness, 2013.
  2. Hennnessy and Patterson, “Computer Architecture: A Quantitative Approach”, Elsevier, Fifth Edition, 2011.
  3. W Stallings, “Computer Organisation & Architecture: Designing for Performance”, Pearson, Eighth Edition, 2010
  4. V. Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer Organisation”, Fifth Edition, McGraw Hill Education (India), 2011.


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