Course Title: 
Digital Systems Security
Course Code: 
Year Taught: 
Postgraduate (PG)
School of Engineering
Cyber Security

"Digital Systems Security" is an elective course offered in Cyber Security Systems & Networks program at School of Engineering, Amrita Vishwa Vidyapeetham, Amritapuri.

Introduction to Hardware Description Languages (HDL) – Design of combinational logic and sequential elements in HDL – Register Files – FIFOs – LIFOs – SIPOs – Bidirectional Shift Register – Universal Shift Register – Barrel Shifter – Linear Feedback Shift Registers – Memory – RAM – Static RAM – Dynamic RAM – Booth Multiplier – Introduction to FSM and State Diagram – Vulnerabilities in Combinational and Sequential Logic – Finite State Machines – Trojan Attacks – Detection and Isolation – Side-channel Attacks - Emerging Hardware Security Topics – Digital Water Marking – Physically Unclonable Functions (PUFs) – Linear Feedback Shift Registers (LFSR) – Pseudo Random Pattern Generators (PRPG) – True Random Number Generators (TRNG) – Boundary scan – Attacks and Protection mechanisms – Logic Design of Crypto algorithms – Introduction to FPGA – Design and Synthesis of Security modules on FPGA.

  1. Michael D. Ciletti, “Advance Digital Design with Verilog HDL”, Pearson Higher Education, 2011.
  2. M. Tehranipoor and C. Wang, “Introduction to Hardware Security and Trust”, Springer, 2011.
  3. Jim Plusquellic, “Trojan Taxonomy”, University of New Mexico,
  4. DebdeepMukhopadhyay, RajatSubhraChakraborty “Hardware Security Design, Threats,and Safeguards”, CRC press, 2015.