Course Syllabus
Introduction to Hardware Description Languages (HDL) – Design of combinational logic and sequential elements in HDL – Register Files – FIFOs – LIFOs – SIPOs – Bidirectional Shift Register – Universal Shift Register – Barrel Shifter – Linear Feedback Shift Registers – Memory – RAM – Static RAM – Dynamic RAM – Booth Multiplier – Introduction to FSM and State Diagram – Vulnerabilities in Combinational and Sequential Logic – Finite State Machines – Trojan Attacks – Detection and Isolation – Side-channel Attacks – Emerging Hardware Security Topics – Digital Water Marking – Physically Unclonable Functions (PUFs) – Linear Feedback Shift Registers (LFSR) – Pseudo Random Pattern Generators (PRPG) – True Random Number Generators (TRNG) – Boundary scan – Attacks and Protection mechanisms – Logic Design of Crypto algorithms – Introduction to FPGA – Design and Synthesis of Security modules on FPGA.