Publications

Abstract : The energy transfer between Power Electronic Converters (PEC) and grid is improved by proper design of synchronization techniques. Phase Lock Loop (PLL) is used to estimate the grid phase angle. The challenges associated with the design of PLL are how fast the phase angle and frequency are estimated and synchronized under ideal as well as non-ideal grid conditions. Synchronous Reference Frame (SRF) PLL is able to work properly under undistorted grid conditions with high bandwidth. But this increased bandwidth introduces harmonics which affects the PLL output and also under distorted grid conditions the SRF-PLL does not produce accurate phase information. This paper proposes a novel design of low-gain PLL using the introduction of Moving Average Filters (MAF) before the Loop Filter (LF). Adaptive MAF (AMAF) is proposed for three phase SRF-PLL and the performance is analyzed for various non-ideal conditions like harmonics, voltage sag, frequency variation etc. The simulation results of the proposed low-gain AMAF-PLL technique are compared with high gain SRF-PLL and finally the results are validated.