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FPGA BASED SYSTEM FOR DENIAL OF SERVICE DETECTION IN SMART GRID

Publication Type : Journal Article

Publisher : Asian Research Publishing Network

Source : ARPN Journal of Engineering and Applied Sciences, Asian Research Publishing Network (ARPN, Volume 10, Number 7 (2015)

Url : http://www.arpnjournals.com/jeas/research_papers/rp_2015/jeas_0415_1853.pdf

Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2015

Abstract : The availability of cheap computing power and instrumentation electronics accompanied by the communication revolution has engendered a complete paradigm shift in the design and implementation of electrical grids. Power grids are envisaged to be transformed into “Smart Grids” incorporating a high degree of intelligence with a view to enhance the reliability and efficiency of generation, transmission and distribution systems. Real-time monitoring of grid parameters enables more effective management of power generation. Prevention of theft by means of smart metering is another major advantage. However, the large scale use of embedded systems, computing resources and communication networks makes the grid vulnerable to cyber attacks. These vulnerabilities can result in consequences ranging from diminished quality of service to catastrophic events such as line trips, extended blackouts and downright damage or destruction of assets. This paper gives a review of the current state-of-the art in cyber security for the smart grid environment. An FPGA based engine for detection of denial-of-service attacks in packets in an Ethernet link is also proposed.

Cite this Research Publication : J. Balaji A. and Dr. Harish Ram D. S., “FPGA BASED SYSTEM FOR DENIAL OF SERVICE DETECTION IN SMART GRID”, ARPN Journal of Engineering and Applied Sciences, vol. 10, 2015.

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