Publication Type : Conference Paper
Publisher : 2019 International Conference on Communication and Electronics Systems (ICCES)
Source : 2019 International Conference on Communication and Electronics Systems (ICCES), IEEE, Coimbatore, India (2019)
Url : https://ieeexplore.ieee.org/document/9002167
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2019
Abstract : In recent technology of digital signal processing applications, we have number of modulation and demodulation techniques. In this domain multiplexing technique is having greatest importance as it has a transmission and reception part with secure systems for communication. Thus orthogonal frequency division multiplexing (OFDM) is superior to other multiplexing techniques, which has multiple carriers with very much robust frequency selective distorted channels. OFDM will have a number of modules such as serial to parallel converter, modulator, IFFT, FFT, demodulator and so on. The Proposed work will concentrate on arithmetic operations in OFDM with re-modified technique using large integer values such as addition, and multiplications. This large integer based arithmetic operation technique were designed using Schönhage-Strassen algorithm (SSA). Thus the proposed method will focus on this SSA algorithm based arithmetic operations with Number Theoretic Transform (NTT) and Inverse Number Theoretic transform (INTT) method. Proposed method of OFDM will replace FFT-IFFT to NTT-INTT method and this application is developed in Verilog HDL and synthesized in Xilinx vivado 15.4. It proved better results in terms of area and delay when compared with conventional design.
Cite this Research Publication : M. Sagar and Ganapathi Hegde, “FPGA Implementation of 8-bit SSA Multiplier for designing OFDM Transceiver”, in 2019 International Conference on Communication and Electronics Systems (ICCES), Coimbatore, India, 2019.