Publication Type : Journal Article
Publisher : IOSRJECE
Source : IOSR Journal of Electronics and Communication Engineering (IOSRJECE), Volume 1, Issue 6, p.46 to 48 (2012)
Url : https://www.iosrjournals.org/iosr-jece/papers/vol1-issue6/I0164648.pdf
Keywords : I-MOS,p-i-n structure,sub-threshold,threshold voltage,on current,off current
Campus : Bengaluru
School : School of Engineering
Department : Electrical and Electronics
Verified : Yes
Year : 2012
Abstract : : One of the “fundamental” problems in the continued scaling of MOSFETs is the 60 mV/decade room
temperature limit in sub-threshold slope. Therefore initial studies on a new kind of transistor, the I-MOS. is
done. The I - MOS uses modulation of the breakdown voltage of a gated p - i - n structure in order to switch
from the OFF to the ON state and vice versa. Since impact-ionization is an abrupt function of the electric field
(or the carrier energy), simulations show that the device has a sub-threshold slope much lower than the above
mentioned. This TCAD Sentaurus project simulates the electrical characteristics of an n-channel impact
ionization metal–oxide–semiconductor (n-IMOS) transistor. The Id–Vg characteristics of a two dimensional
(2D) n-IMOS structure are simulated. The Id–Vg characteristics are simulated for drain biases of 0 V and 1.1 V.
In addition, various electrical parameters such as the breakdown voltage, the threshold voltage, the subthreshold slope, and the on-current and off-current are extracted
Cite this Research Publication : S. Yadav and PukhrajVaya, D., “Lateral I - Mos (Impact – Ionization) Transistor”, IOSR Journal of Electronics and Communication Engineering (IOSRJECE), vol. 1, no. 6, p. 46 to 48, 2012.