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Optimal FPGA implementation of CL multiwavelets architecture for signal denoising application

Publication Type : Journal Article

Publisher : International Journal of Electronics

Source : International Journal of Electronics, Volume 100, Number 3, p.288-301 (2013)

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Keywords : Architecture, Compact support, Field programmable gate arrays (FPGA), FPGA implementations, Fpga(field programmable gate array), ITS architecture, Multi-wavelet transform, Multi-wavelets, Multiwavelet, New dimensions, Orthogonality, Performance measure, Processing architectures, Real time, Real-time signal processing, Scalar wavelet, Signal denoising, Wavelet filters, Wavelet thresholding

Campus : Coimbatore

School : School of Engineering

Center : Electronics Communication and Instrumentation Forum (ECIF)

Department : Electronics and Communication

Verified : Yes

Year : 2013

Abstract : Wavelet transform is considered one of the efficient transforms of this decade for real time signal processing. Due to implementation constraints scalar wavelets do not possess the properties such as compact support, regularity, orthogonality and symmetry, which are desirable qualities to provide a good signal to noise ratio (SNR) in case of signal denoising. This leads to the evolution of the new dimension of wavelet called multiwavelets, which possess more than one scaling and wavelet filters. The architecture implementation of multiwavelets is an emerging area of research. In real time, the signals are in scalar form, which demands the processing architecture to be scalar. But the conventional Donovan Geronimo Hardin Massopust (DGHM) and Chui-Lian (CL) multiwavelets are vectored and are also unbalanced. In this article, the vectored multiwavelet transforms are converted into a scalar form and its architecture is implemented in FPGA (Field Programmable Gate Array) for signal denoising application. The architecture is compared with DGHM multiwavelets architecture in terms of several objective and performance measures. The CL multiwavelets architecture is further optimised for best performance by using DSP48Es. The results show that CL multiwavelet architecture is suited better for the signal denoising application. © 2013 Copyright Taylor and Francis Group, LLC.

Cite this Research Publication : B. Ma Kumar, Lavanya, R. Vb, and Sumesh, E. Pb, “Optimal FPGA implementation of CL multiwavelets architecture for signal denoising application”, International Journal of Electronics, vol. 100, pp. 288-301, 2013.

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