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VLSI architecture for despeckling of SAR image using parametric multiwavelet

Publication Type : Conference Paper

Publisher : Procedia Engineering

Source : Procedia Engineering, Volume 30, Coimbatore, p.1205-1211 (2012)

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Keywords : Communication, Compact support, De-noising, De-speckling, Image quality, Linear filtering, Multiwavelet, Non-linear methods, Orthogonality, Post-filtering, SAR Images, SAR(synthetic aperture radar), Signal to noise ratio, Speckle noise, Sureshrink, Symmetry properties, Synthetic aperture radar, Systems analysis, VLSI architectures

Campus : Coimbatore

Year : 2012

Abstract : Removal of speckle noise from SAR (Synthetic Aperture RADAR) image is of greatest interest to many researches for practical as well as theoretical purposes. Many traditional linear and non linear methods are proposed for the despeckling of SAR image. Recently, non linear method using wavelet transform is found to be better of this denoising, due to its advantages over linear filtering. Since Multiwavelet provide compact support orthogonality and symmetry property simultaneously, the experimental results show a better SNR (Signal to Noise Ratio) value of 3% when compared to ordinary wavelets. This paper demonstrates the work of VLSI architecture of designed parametric multiwavelet with Baye's shrink for the noise reduction. The architecture is implemented in virtex5 (xc5vsx240t-2ff1738) FPGA and experimental results shows that the proposed work have 8% of improved image quality. Therefore it is suited better for all denoising and compression applications.

Cite this Research Publication : Ra Vidhyalavanya and Madheswaran, Mb, “VLSI architecture for despeckling of SAR image using parametric multiwavelet”, in Procedia Engineering, Coimbatore, 2012, vol. 30, pp. 1205-1211.

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