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Publication Type : Conference Paper
Publisher : 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)
Source : 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT), IEEE, Chennai, India (2016)
Keywords : Algorithm design and analysis, BAC Algorithm (Boolean algebra Cryptography), Boolean algebra, Complement, cryptographic algorithm, Cryptography, Decryption, Encryption, Field programmable gate arrays, FPGA, Logic design, Public key, reprogrammable silicon chips, Secure transmission, Signal processing algorithms, Unicode, VLSI, VLSI implementation, XOR operation
Campus : Amritapuri
School : School of Engineering
Department : Electronics and Communication
Year : 2016
Abstract : FPGA is an integrated circuit, which can be reconfigured by designers themselves. FPGA are reprogrammable silicon chips. Field Programmable Gate Arrays (FPGA) are used for hardware implementations of cryptographic algorithm. This paper presents an FPGA based Hardware implementation of Boolean algebra based cryptographic algorithm for secure transmission. Using this algorithm, we can hide the meaning of a message in unreadable characters. ASCII values of characters, numbers and symbols are used for encryption and decryption. ASCII values converted into binary number and it takes 32 bits in implementation. Boolean operations such as 1's and 2's complement and xor operation are used for encryption and decryption. Xilinx - sparton3E FPGA kit is used for the synthesizing and implementation of cryptographic algorithm.
Cite this Research Publication : S. Ammu and Remya Ajai A. S., “VLSI implementation of Boolean algebra based cryptographic algorithm”, in 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT), Chennai, India, 2016.