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Design and analysis of low power 8-bit ALU on reversible logic for nanoprocessors

Publication Type : Journal Article

Publisher : Springer Science and Business Media LLC

Source : Journal of Ambient Intelligence and Humanized Computing

Url : https://doi.org/10.1007/s12652-018-1074-y

Campus : Chennai

School : School of Engineering

Year : 2018

Abstract : A low power reversible 8-bit ALU using single electron transistor (SET) for Nano processors is designed in this paper. Since there is a possibility in reversible logic to build circuits from many-port gates that do not destroy the capacity to store information, the basic blocks of ALU are constructed using one of the assuring many port gates called DKGP reversible gate. Then the blocks are technologically advanced to the transistor level using CMOS technology. The outputs are verified for given input frequency with the operating voltage of 5 V using SPICE simulation. It is also observed that the output glitches are obtained with low operating voltage of less than 2 V in CMOS technology. The same blocks of ALU are constructed using SET technology and the outputs are verified through simulation. The simulation results have shown that the same output response with no glitches is obtained for the same input frequency as in CMOS, with very low operating voltage of 25 mV. It is inferred that there is a drastic difference in power dissipation with SET and CMOS technology. Therefore SET technology has the potential toward the development of Nano-electronic components and can be adopted for various low power digital applications. This is the first attempt to design reversible ALU using pure SET technology from our study.

Cite this Research Publication : T. M. Amirthalakshmi, S. Selvakumar Raja, Design and analysis of low power 8-bit ALU on reversible logic for nanoprocessors, Journal of Ambient Intelligence and Humanized Computing, Springer Science and Business Media LLC, 2018, https://doi.org/10.1007/s12652-018-1074-y

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