Course

Module I

Introduction to computer system – Brief history of computer systems-Fixed point arithmetic – Addition – Subtraction -Multiplication and division – Booth’s algorithm – Non-restoring division algorithm – Floating point arithmetic. Various addressing modes and designing of an Instruction set.

Module II

Data path and controller design – Introduction to CPU design -Processor organization -Execution of complete instruction- Design of control unit – Micro programmed control unit

Module III

Memory and system organization – Concepts of semiconductor memory – CPU-memory interaction – Organization of memory modules – Cache memory and related mapping and replacement policies – Virtual memory. Introduction to input/output processing: Programmed controlled I/O transfer – Interrupt controlled I/O transfer DMA – Secondary storage and type of storage devices – Introduction to buses – Introduction to RISC and CISC paradigm – Design issues of a RISC processor and example of an existing RISC processor – Introduction to pipelining.

Course Objectives

• To conceptualize the basics of organizational and architectural issues of a digital computer.
• To analyze performance issues in processor and memory design of a digital computer.
• To understand various data transfer techniques in digital computer.
• To analyze processor performance improvement using instruction level parallelism

Course Outcomes

• CO1: Ability to understand the design principles of Instruction Set Architecture (ISA).
• CO2: Ability to design, Implementation and Analysis of data path for instruction execution.
• CO3: Ability to understand design of instruction and analyze and evaluate the performance of processors.
• CO4: Ability to uunderstand Pipelined architecture and Design of 3 and 5 stage pipeline processor in MIPS
• CO5: Ability to uunderstand the working of Arithmetic and Logic Unit
• CO6: Ability to uunderstanding the concepts of Memory Organization

CO – PO Mapping

Textbook / Reference

• John P.Hayes, “Computer architecture and Organisation”, Tata McGraw-Hill, Third edition 1998.
• V.CarlHamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer Organisation”, Fifth edition, McGraw-Hill Inc, 1996.
• Morris Mano, “Computer System Architecture”, Prentice-Hall of India, 2000.
• BehroozParhami, “Computer Architecture”, Oxford Press.
• P.Pal Chaudhuri, , “Computer organization and design”, 2nd Ed., Prentice Hall of India,2007.
• G.Kane&J.Heinrich, “MIPS RISC Architecture”, Englewood cliffs, New Jersey, Prentice Hall, 1992.

Evaluation Pattern 50:50 (Internal: External)