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Course Detail

Course Name Hardware Security and Trust
Course Code 15ECE367
Program B. Tech. in Electronics and Communication Engineering
Year Taught 2019

Syllabus

Unit 1

Background on VLSI testing – Test generation – Structured DFT techniques overview – Scan design – Boundary scan method – BIST schemes – Hardware trojan – Trojan taxonomy – Case study – Trojan detection – Classification of trojan detection – Challenges in trojan detection

Unit 2

Design for hardware trust – Delay based methods – Shadow registers – Ring oscillators – Dummy scan Flip-Flop insertion – Trojan activation time analysis – Layout-aware scan cell reordering – Trojan detection and isolation flow.

Unit 3

Security and testing – Scan-based testing – Scan-based attacks and counter measures – System-on-chip test infrastructure – Emerging areas of test security. Trojan prevention: Built-in self authentication – BISA structure and insertion flow – Analyzing BISA structure – Trusted design in FPGAs.

Text Books

  1. Mohammad Tehranipoor and Cliff Wang (Eds.), “Introduction to Hardware Security and Trust”, Springer, New York, 2012.

Resources

  1. Mohammad Tehranipoor, Hassan Salmani and Xuehui Zhang, “Integrated Circuit Authentication – Hardware Trojans and Counterfeit Detection”, Springer International Publishing, Switzerland 2014.

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