May 13, 2010
Amrita School of Engineering, Bengaluru
 

Dr. Shikha Tripathi presented a paper titled Unified 3GPP and 3GPP2 Turbo Encoder FPGA Implementation Using Run-time Partial Reconfiguration at the 9th Wireless Telecommunications Symposium organized in Tampa, Florida, USA during April 21-23, 2010.
 

The only paper selected in its category from India, it will be archived in IEEE Explore.
 

Dr. Shikha undertook this research work with undergraduate students, Rishi Mathur and Jyoti Arya. At the conference, the paper won the best paper award in the category of contribution by undergraduate students.
 

Dr. Shikha, who has a Ph.D. in Image Compression from BITS, Pilani explained the work undertaken.
 

“With the advent of Software Defined Radio (the next generation radio), it has become important to look for the implementation of communication systems that support multiple standards on common hardware.”
 

“Among reconfigurable / re-programmable devices, FPGAs have proved to be among the best in class. In a field-programmable gate array, reconfiguration takes place at circuit level. Through partial reconfiguration, multiple standards can be quickly implemented for a unified design.”
 

Dr. Shikha, with the students, worked on an FPGA implementation using run-time partial reconfiguration to develop a unified 3GPP and 3GPP2 turbo encoder. The paper proposed a partially reconfigurable design of unified turbo encoder of two 3G standards – 3GPP and 3GPP2 on FPGA Xilinx Virtex- IV. She explained further.
 

“A turbo encoder essentially comprises of two identical Recursive Systematic Convolutional (RSC) encoders working in parallel, an interleaver and a multiplexer. In the proposed design, serial data is fed directly to one of the encoders while the other encoder receives it through the interleaver.”
 

“The output of both the RSC encoders is then multiplexed according to a predefined puncturing pattern which results in a turbo-encoded bitstream. Interleaving is one of the most useful and widely used techniques for constructing burst-error correcting codes.”
 

Why was the paper chosen for the best paper award in its category?
 

“Maybe because the design showed substantial improvement in hardware implementation of the interleavers over previous designs,” explained Dr. Shikha. “In order to achieve the best possible results with partial reconfiguration, maximum common functionality from both the turbo encoders was identified and a unified architecture was proposed.”
 

“Also we devised novel ways to perform the computationally intensive operations of the 3GPP interleaver with minimal hardware requirement and the least possible number of clock cycles over previous designs.”
 

Paper Details
Shikha Tripathi, Rishi Mathur, Jyoti Arya, Unified 3GPP and 3GPP2 Turbo Encoder FPGA Implementation Using Run-time Partial Reconfiguration, Proceedings of the Wireless Telecommunications Symposium 2010, USF, Tampa, Florida, USA, April 21-23, 2010.