Publications

Abstract : Pseudo random sequences are used in testing a logical circuit which can be generated from Linear Feedback Shift Register (LFSR). The proposed pattern generator can work both as an external and internal LFSR depending on the control signal. A number of patterns can be generated by using the proposed design which can be used in logical circuit testing. Primitive polynomials with degrees ranging from 3 to 11 are implemented using the proposed design. The implemented design is synthesized in Vivado on Zynq-7000 and the analysis is done on parameters timing, power and utilization. The proposed design is compared with the previously implemented design which uses XNOR gate and without reseeding. The proposed design improves the quality of patterns generated as well as the structure of pattern generator which was previously implemented.