Publications

Abstract : This work concentrates on the design and implementation of Programmable Multiple Input Signature Register (MISR). The advancement going on in Very Large Scale Integration has made chip testing additional difficult because of that it made path for the huge demand for Logic Built in Self-Test. It permits self-testing by assistance of an extra hardware within design. A reconfigurable form of Linear Feedback Shift Register(LFSR) is used to generate the test patterns as well as to compact the response inside the circuit design. Whereas Multiple Input Signature Register(MISR) are used to compact the multiple bit output responses into the distinct bit response and to analyze the output response which helps in quicken the methodology to test the circuit. The proposed design can be implemented for any number of bit size and it is simulated in Xilinx Vivado. The Four structural representations like Standard form, Modular form, Complete and Hybrid form of MISR in different sized bit (4 and 128) are implemented. The delay, power consumption and number of bounded input and outputs are analyzed for all four configurations.