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Publication Type : Conference Paper
Publisher : Proceeding of International Conference on Applied Soft Computing and Communication Networks
Source : Proceeding of International Conference on Applied Soft Computing and Communication Networks (ACN 2019), LNNS 125, 63-79 (2019)
Campus : Coimbatore
School : School of Engineering
Department : Mathematics
Year : 2019
Abstract : System on chip (SoC) cannot handle the large communication systems due to increasing number of applications. Network on chip (NoC) is an alternative technology to system on chip (SoC) to improve the performance. Still, NoC faces a lot of challenges in its design and testing. The main challenges are power, area, and latency constraints. Router places an important role in communication between the cores. Design of a router is an integral part of a NoC system design. In this paper, we have considered the mesh-of-grid (MoG) topology. We have proposed an architecture for virtual channel router (VCR) to reduce the area and power. Region-based routing (RBR) mechanism is used here to optimize the area and power. We have evaluated various network parameters using the Network Simulator-2. Our experimental results show that the architecture with RBR mechanism gives a significant reduction in area and power in comparison with table-based mechanism and other mechanism. We have shown that the MoG topology gives better latency and packet delivery ratio than the mesh topology.
Cite this Research Publication : Dr. Somasundaram K., “Design of a Virtual Channel Router Architecture for Low Power on Mesh-of-Grid Topology for Network on Chip”, in Proceeding of International Conference on Applied Soft Computing and Communication Networks (ACN 2019), LNNS 125, 63-79, 2019.