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Design of an efficient reversible 8×8 wallace tree multiplier

Publication Type : Journal Article

Publisher : World Applied Sciences Journal

Source : World Applied Sciences Journal, Volume 20, Number 8, p.1159-1165 (2012)

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Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2012

Abstract : Reversible logic gates provide power optimization which can be used in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper proposes a Novel reversible 4:2 compressor, 6:2 compressor and 9:2 compressor designed from the DKGP gate that can work singly as a reversible full adder/full subtractor. These are later used to design a novel 8x8 reversible Wallace tree multiplier. This is the first attempt to design a reversible 6:2 and 9:2 compressors and a reversible Wallace tree multiplier using the above said circuits as far as our knowledge is concerned. Thus, this paper provides a threshold to build more complex systems using reversible logic. © IDOSI Publications, 2012.

Cite this Research Publication : Da Krishnaveni, Priya, MbGeetha, and Baskaran, Kc, “Design of an efficient reversible 8x8 wallace tree multiplier”, World Applied Sciences Journal, vol. 20, pp. 1159-1165, 2012.

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