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Gray code for test pattern generation

Publication Type : Conference Proceedings

Publisher : AIP Conference Proceedings

Source : AIP Conference Proceedings (2020)

Url :

Campus : Amritapuri

School : School of Engineering

Department : Electronics and Communication

Year : 2020

Abstract : Electronic components combined into high-density module to form Integrated Circuits. Testing of ICs for quality assurance uses almost 50% - 60% of manufacturing costs for some mixed signal ICs. Manual testing cannot meet the need of complex ICs. Random test patterns are used to test such ICs. In this paper, we have implemented test pattern generation system using gray code generator. Gray code generator reduces time and resource requirement to test DUT. Gray code is use in many applications such as FIFO, state diagram because of its one-bit toggle nature as compared to binary number. Gray code generator uses only half of the power as compared to basic counter and correspondingly generate less noise. Test patterns generated by proposed system toggles by one bit which results in one-bit difference in each of the test patterns. Proposed system is integrated with ISCAS’89 benchmark circuits for testing. Hamming distance can be applied to the proposed system to further reduce the time requirement as the difference between test patterns will be 1. Further this system can also be implemented in BIST for more adequate performance.

Cite this Research Publication : P. Dilip, R.S. Geethu, and Bhakthavatchalu, R., “Gray code for test pattern generation”, in AIP Conference Proceedings, 2020.

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