Publication Type : Journal Article
Publisher : Research India Publications
Source : International Journal of Applied Engineering Research, Research India Publications, Volume 10, Number 16, p.37151-37155 (2015)
Url : http://www.scopus.com/inward/record.url?eid=2-s2.0-84942066908&partnerID=40&md5=ab33b3a37ca60dd4a412bb9ce6c74507
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Year : 2015
Abstract : This paper proposes a method for implementing a Butterworth IIR low pass filter on Xilinx Spartan-6 XC6SLX45 FPGA board. The FPGA implementation is preferred because of increased computational speed compared with implementation in DSP processors. The IIR filter coefficients are calculated manually and the direct form II structure was simulated on Simulink with Xilinx block sets. In addition to simulation, hardware/software co-simulation was performed and it was observed that similar results were obtained. © Research India Publications.
Cite this Research Publication : A. J. Thottupattu, Neha, S., and S. Veni, “Hardware software co-simulation of IIR filter using Xilinx system generator for FPGA implementation”, International Journal of Applied Engineering Research, vol. 10, pp. 37151-37155, 2015.