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Publication Type : Conference Proceedings
Thematic Areas : Amrita Center for Cybersecurity Systems and Networks
Publisher : IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)
Source : 2020 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS) (2020)
Campus : Amritapuri
School : Centre for Cybersecurity Systems and Networks
Center : Cyber Security
Department : cyber Security
Year : 2020
Abstract : IoT security is of paramount concern due to poorly configured devices that can often serve as entry points for cyber attacks. Developing Physically Unclonable Functions (PUFs) and making them resilient can enhance hardware security. In this work, we propose a XOR-mesh based PUF composed of network of XOR-gates and multiplexers. The proposed PUF was implemented on an Artix-7 FPGA and evaluated in terms of hardware and power consumption. The Challenge-Response Pairs (CRPs) were extracted and used to evaluate the PUF quality and attack resilience against two machine learning algorithms such as Logistic Regression (LR) and Support Vector Machine (SVM). Evaluation shows that our PUF is power efficient, utilises only 16.35% of total available slices on the FPGA and resilient to linear modeling attacks irrespective of response sequence length. This makes it suitable for lightweight and secure applications in IoT security.
Cite this Research Publication : A. Rajan and Sriram Sankaran, “Lightweight and Attack-resilient PUF for Internet of Things”, 2020 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS). 2020.