Publication Type : Journal Article
Publisher : Journal of Nanoscience and Nanotechnology
Source : Journal of Nanoscience and Nanotechnology, Volume 11, Number 12, p.11015-11018 (2011)
Url : http://www.scopus.com/inward/record.url?eid=2-s2.0-84857150117&partnerID=40&md5=dfafdff720d08a948d10ae46bcd9f8bb
Keywords : Aggressive scaling, Carbon nanotube transistors, Carbon nanotubes, Chirality, CMOS, CMOS devices, CMOS integrated circuits, Electric properties, Fundamental limits, High-performance integrated circuits, Metal electrodes, Power efficient, Silicon Technologies, Source/drain regions, VLSI circuits
Campus : Amritapuri
School : School of Engineering
Department : Mechanical Engineering
Year : 2011
Abstract : Aggressive scaling of silicon technology over the years has pushed CMOS devices to their fundamental limits. Pioneering works on carbon nanotube during the last decade possessing exceptional electrical properties have provided an intriguing solution for high performance integrated circuits. So far, at best, carbon nanotubes have been considered only for the channel, with metal electrodes being used for source/drain. Here, alternative schemes of 'All-Nanotube' transistor are presented where even the transistor components are derived from carbon nanotubes which hold the promise for smaller, faster, denser and more power efficient electronics. Copyright © 2011 American Scientific Publishers All rights reserved.
Cite this Research Publication : Sa Dutta and Shankar, Bb, “Nanotube substituted source/drain regions for carbon nanotube transistors for vlsi circuits”, Journal of Nanoscience and Nanotechnology, vol. 11, pp. 11015-11018, 2011.