Publication Type : Journal Article
Publisher : IETE Journal of Research
Source : IETE Journal of Research, Volume 50, Number 4, p.297-304 (2004)
Keywords : Aggregator operators, biomedical engineering, Cerebral blood flow, Computer simulation, Electroencephalography, Epilepsy risk level, Feature extraction, Fuzzy processors, Fuzzy sets, Parallel architecture, Parallel processing systems, VLSI circuits, VLSI simulation
Year : 2004
Abstract : This paper emphasizes on a new VLSI design for fuzzy processor in biomedical application. The parallel computing architecture incorporated in the design decides epilepsy risk level in diabetic neuropathy. The basis of such architecture is described in this paper where independent functional units of the architecture are incorporated. They can process the data simultaneously by which the processing speed can be enhanced. This architecture is implemented and simulated using VHDL simulation tool. The obtained results correspond closely to the physician's diagnosis. This VHDL. design may also be extended to other application where independent functional units can be developed.
Cite this Research Publication : Ka Paramasivam, Harikumar, Rb, and Sundararajan, Rc, “Simulation of VLSI design using parallel architecture for epilepsy risk level diagnosis in diabetic neuropathy”, IETE Journal of Research, vol. 50, pp. 297-304, 2004.