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VLSI architecture for Reliability based soft decision decoding of turbo codes for satellite communication

School: School of Engineering, Coimbatore

Project Incharge:Dr. Yamuna B.
Funded by:Funded by Indian Space Research Organization- RESPOND Project
VLSI architecture for Reliability based soft decision decoding of turbo codes for satellite communication

This work is focused on hardware design of Soft Decision Decoders (SSD) that use channel output information as reliability measures to improve the coding gain with associated levels of complexity. The project is geared towards FPGA implementation of the reliability based SSD for Turbo codes to suit deep space applications.

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