Course

Unit 1:

Introduction to hardware security and trust – Basics of VLSI Design and Test – Integrated Circuits (IC) Trojans – Taxonomy – Multi level attacks – Vulnerabilities in Combinational and Sequential Logic – Design for Hardware Trojans –Combinational Trojans – Synchronous and Asynchronous Counter-based Sequential Trojan – Hardware Trojan Insertion – Emerging applications and the new threats.

Unit 2:

Side-Channel Attacks include Power Spectrum Analysis – EM Analysis – Timing and Delay Analysis – Self-Referencing Methodology – Analysis of Process Variations – Fault Injection and Attacks – FPGA Security Attacks – Physical Attacks on FPGA and Countermeasures.

Unit 3:

Hardware security primitives – Physically Unclonable Functions (PUFs) – PUF Taxonomy – Delay Based PUFs – Memory-based PUF – Ring Oscillator PUF (RO-PUF) – Fault Attacks on PUFs – Privacy in PUF – True Random Number Generators (TRNG) – Protection of Intellectual Property (IP) – Watermarking Techniques for IP Protection – Quantum Resistance Cryptography – Validation of Security and Trust

Course Objectives

• To introduce security and trust issues associated with hardware systems.
• To provide a background for recommending countermeasures for security and trust vulnerabilities.
• To impart experience in the design and implementation of security and trust primitives on both ASIC and FPGA.
• To impart knowledge aimed towards devising security and trust design and evaluation processes.

Course Outcomes: At the end of the course, the student should be able to

• CO1: To understand various threats in Hardware systems due to hardware Trojans.
• CO2: To apply various techniques to detect Hardware Trojans and securing designs.
• CO3: To analyze various design for security methods.
• CO4: To evaluate the requirements of reconfigurable hardware and security countermeasures.

Skills Acquired: Will acquire knowledge to design hardware with integrated security features, and ensure trustworthiness of VLSI circuits.

CO-PO Mapping:

1. Tehranipoor and C. Wang, Introduction to Hardware Security and Trust, Springer, 2011. 
2. Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, Hardware Security Design, Threats, and Safeguards, Chapman & Hall, CRC Press, Taylor and Francis book, 2015.
3. Prabhat Mishra, Swarup Bhunia, Mark Tehranipoor, Hardware IP Security and Trust, Springer, 2017. 
4. Edward Suh and S. Devadas, Physical Unclonable Functions for Device Authentication and Secret Key Generation, DAC-2007.
5. Badrignans, B., Danger, J.-L., Fischer, V., Gogniat, G., Torres, L. (Eds.), Security Trends for FPGAs – From Secured to Secure Reconfigurable Systems, Springer, 2011.